In the field of semiconductor device manufacturing, numerous efforts have been made to increase the density of semiconductor devices through their miniaturization. Recently, attention is being directed to a semiconductor device stacking technique called three-dimensional (3D) packaging as means for increasing the density per unit area of semiconductor devices.
Semiconductor devices stacked in the vertical direction may include electrodes that are arranged to penetrate through a substrate made of silicon, for example. In this way, the semiconductor devices may be electrically connected via the electrodes. To create such an electrode that penetrates through a substrate, a resist is applied on the substrate using a coater, the resist is exposed using an exposure apparatus, and a resist pattern is developed using a developing apparatus. The resist is then used as a mask to etch the substrate using a plasma etching apparatus to create a through hole or a via hole. After creating the through hole or via hole in the substrate, the resist remaining on the substrate is removed by ashing.
When etching the substrate using the plasma etching apparatus in the above process, if the resist applied on the substrate extends to the outer edge portion of the substrate, the resist may come into contact with a substrate carrier or a transfer arm and come off during transfer of the substrate, and this may result in the generation of dust. Accordingly, after applying the resist on the substrate, the resist is removed from the rear surface and the outer edge portion including a bevel portion of the substrate by a back rinse mechanism and a bevel rinse mechanism of the coater using an organic solvent, for example. In this way, dust may be prevented from being generated as a result of the resist coming off of the outer edge portion of the substrate (See e.g., Patent Document 1).
As another way of preventing the generation of dust as a result of the resist material coming off of the outer edge portion of a substrate, after applying the resist on the substrate and exposing the entire substrate to form a resist pattern, an insolubilization process may be performed on the resist pattern formed at the outer edge portion of the substrate using a developing solution (See e.g., Patent Document 2).